FEATURES

Low Voltage and Standard Voltage Operatiom

  -5 (Vcc=4.5V to 5.5V)

  -2.7 (Vcc=2.7V to 5.5V)

  -1.8 (Vcc=1.8V to 3.6V)

Internally Organized 16384 x 8 and 32768 x 8

2-wire Serial Interface

Schmitt Trigger,Filtered Inputs for Noise Suppression

Bidirectional Data Transfer Protocol

1MHZ (5V),400KHZ (2.7V) and 100 KHZ(1.8V) compatibility

Write Protect Pin for Hardware and Software Data Protection

64-Bytes Page Write Mode (Partial Page Writes Allowed)

Self-Timed Write Cycle (5 ms typical)

High Reliability

  -Endurance:100000 Write Cycles

  -Data Retention:40 Years

  -ESD Protection:>4000V

Automotive Grade and Extended Temperature Devices Available

8-Pin JEDEC PDIP,8-Pin JEDEC and EIA SOIC,14-Pin TSSOP,and 8-Pin Leadless Array Packages

DESCRIPTION

The AT24C128/256 provides 13072/262144 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 16384/32768 words of 8 bits each.The device's cascadable feature allows up to 4 devices to share a common 2-write bus.The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essenfial.The devices are available in space-saving 8-pin JEDEC PDIP,8-pin EIAJ,9-pin JEDEC SOIC,14-pin TSSOP,and 8-pin LAP packages.In addition,the entire family is available in5V (4.5 to 5.5V),2.7V (2.7V to 5.5V) and 1.8V (1.8 to 3.6V) versions.

Pin Configurations